In an effort to create an ever increasing number of features on an integrated circuit, many circuit designers are employing a variety of techniques to decrease the size of a feature that can be created with a photolithographic process on a wafer. One technique commonly used to create small features on a wafer is to use phase-shifters instead of opaque feature patterns on a photolithographic mask or reticle. With a phase-shifter, light is shifted 180° out of phase with respect to the phase of light passing through an adjacent non-phase-shifting portion of the mask or reticle. The interfering non-phase shifted and phase-shifted light produces a dark region of very high contrast with the surrounding bright background, enabling the selective patterning of circuit features
FIG. 1 illustrates a representative pattern of features on a photolithographic mask or reticle that are used to selectively expose areas on a semiconductor wafer. The mask patterns include a number of opaque chrome patterns 10 that form corresponding features on a wafer in a conventional manner. In addition, the mask includes a number of sub-resolution features (SRAFs) 20 whose dimensions are too small to be resolved on the wafer by the photolithographic printing system, but aid in the exposure of adjacent areas. In addition, the mask includes a number of phase-shifting regions 30 that are designed to shift the illumination light by 180° compared with light that passes through adjacent clear or non-phase-shifting areas 40 that surround the phase-shifters. The phase-shifting regions 30 are typically formed by etching the quartz substrate by a desired amount or by placing a phase-shifting film on the mask substrate material. In addition, the mask layout shown in FIG. 1 includes a number of phase gratings 50 that are formed by alternating patterns of phase-shifting regions 30 and non-phase-shifting regions 40. Phase gratings can be used to form any arbitrarily shaped polygon in an integrated circuit.
FIGS. 2A-2C illustrate how a desired feature can be created with a phase grating and what optical distortions can occur in the printing process. FIG. 2A shows a desired feature pattern 60 to be created on a semiconductor wafer. To create the pattern with a phase grating, the feature pattern 60 shown in FIG. 2A is divided up into a number of phase-shifting regions 62. As shown in FIG. 2B, the phase-shifting regions shift the phase of the light passing through the phase-shifting regions by 180° compared with the light passing through the non-phase-shifting regions 64 that surround the phase-shifting regions. When exposed with an illumination light, the phase grating patterns create a feature pattern 70 as shown in FIG. 2C. Comparing the pattern 70 that is created on a wafer with the desired pattern 60, as shown in FIG. 2A, it can be seen that some distortions may occur. For example, an area 72 comprises a pinched region that, if severe enough, may affect the operation of the circuit in which the feature 70 is located.
To counteract for the distortions that may occur when the object 70 is created on a semiconductor wafer, many circuit designers utilize one or more resolution enhancement techniques (RETs) such as optical and process correction (OPC) that attempt to pre-compensate for optical distortions that will occur during the printing process. With traditional OPC, some edges of the mask patterns are moved in order to enhance the fidelity of the image printed on the semiconductor wafer. In a phase grating structure, the only edges that can be adjusted are associated with the phase-shifting regions. If an expected edge position error (EPE) is found in a region that does not have a corresponding edge that can be adjusted, it has been previously impossible to correct for the expected error. Therefore, there is a need for a mechanism for improving the fidelity of features to be created with phase-shifting patterns, such as phase gratings, in order to improve the printing fidelity in regions that do not have corresponding feature edges that can be moved.